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H A D | cm-regbits-33xx.h | a86c0b98 Wed Sep 19 19:05:15 CDT 2012 Vaibhav Hiremath <hvaibhav@ti.com> ARM: AM33XX: cm: Add bit-field width values
The new common clk framework includes basic definitions for mux and divider clocks. These definitions depend on shift and width values instead of the pre-computed masks that the OMAP/AM33XX clk framework has traditionally used when accessing the register to control the mux or divisor.
To ease this transition the masks are left intact and the width field is simply added alongside the shift and mask data.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> a86c0b98 Wed Sep 19 19:05:15 CDT 2012 Vaibhav Hiremath <hvaibhav@ti.com> ARM: AM33XX: cm: Add bit-field width values The new common clk framework includes basic definitions for mux and divider clocks. These definitions depend on shift and width values instead of the pre-computed masks that the OMAP/AM33XX clk framework has traditionally used when accessing the register to control the mux or divisor. To ease this transition the masks are left intact and the width field is simply added alongside the shift and mask data. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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H A D | control.h | a86c0b98 Wed Sep 19 19:05:15 CDT 2012 Vaibhav Hiremath <hvaibhav@ti.com> ARM: AM33XX: cm: Add bit-field width values
The new common clk framework includes basic definitions for mux and divider clocks. These definitions depend on shift and width values instead of the pre-computed masks that the OMAP/AM33XX clk framework has traditionally used when accessing the register to control the mux or divisor.
To ease this transition the masks are left intact and the width field is simply added alongside the shift and mask data.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> a86c0b98 Wed Sep 19 19:05:15 CDT 2012 Vaibhav Hiremath <hvaibhav@ti.com> ARM: AM33XX: cm: Add bit-field width values The new common clk framework includes basic definitions for mux and divider clocks. These definitions depend on shift and width values instead of the pre-computed masks that the OMAP/AM33XX clk framework has traditionally used when accessing the register to control the mux or divisor. To ease this transition the masks are left intact and the width field is simply added alongside the shift and mask data. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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