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/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8167-vdec.ca6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A Dclk-mt8167-img.ca6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A Dclk-mt8167-mfgcfg.ca6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A Dclk-mt8167-aud.ca6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A Dclk-mt8167-mm.ca6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A Dclk-mt8167.ca6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A DKconfiga6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
H A DMakefilea6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
a6822483 Fri Sep 18 08:23:03 CDT 2020 Fabien Parent <fparent@baylibre.com> clk: mediatek: Add MT8167 clock support

Add the following clock support for MT8167 SoC: topckgen, apmixedsys,
infracfg, audsys, imgsys, mfgcfg, vdecsys.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20200918132303.2831815-2-fparent@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>