Searched hist:a5958a93 (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/include/dt-bindings/clock/ |
H A D | exynos5433.h | a5958a93 Mon Feb 02 18:13:56 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain
This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> a5958a93 Mon Feb 02 18:13:56 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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/openbmc/linux/drivers/clk/samsung/ |
H A D | clk-exynos5433.c | a5958a93 Mon Feb 02 18:13:56 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain
This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> a5958a93 Mon Feb 02 18:13:56 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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