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/openbmc/linux/Documentation/devicetree/bindings/reset/ |
H A D | ti-syscon-reset.txt | a3828519 Mon Jun 27 12:12:16 CDT 2016 Andrew F. Davis <afd@ti.com> Documentation: dt: reset: Add TI syscon reset binding
Add TI syscon reset controller binding. This will hook to the reset framework and use syscon/regmap to set reset bits. This allows reset control of individual SoC subsytems and devices with memory-mapped reset registers in a common register memory space.
Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> a3828519 Mon Jun 27 12:12:16 CDT 2016 Andrew F. Davis <afd@ti.com> Documentation: dt: reset: Add TI syscon reset binding Add TI syscon reset controller binding. This will hook to the reset framework and use syscon/regmap to set reset bits. This allows reset control of individual SoC subsytems and devices with memory-mapped reset registers in a common register memory space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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/openbmc/linux/include/dt-bindings/reset/ |
H A D | ti-syscon.h | a3828519 Mon Jun 27 12:12:16 CDT 2016 Andrew F. Davis <afd@ti.com> Documentation: dt: reset: Add TI syscon reset binding
Add TI syscon reset controller binding. This will hook to the reset framework and use syscon/regmap to set reset bits. This allows reset control of individual SoC subsytems and devices with memory-mapped reset registers in a common register memory space.
Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> a3828519 Mon Jun 27 12:12:16 CDT 2016 Andrew F. Davis <afd@ti.com> Documentation: dt: reset: Add TI syscon reset binding Add TI syscon reset controller binding. This will hook to the reset framework and use syscon/regmap to set reset bits. This allows reset control of individual SoC subsytems and devices with memory-mapped reset registers in a common register memory space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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