Searched hist:"9 e4aa1fa" (Results 1 – 5 of 5) sorted by relevance
/openbmc/qemu/hw/nvram/ |
H A D | xlnx-versal-efuse-cache.c | 9e4aa1fa Fri Sep 17 00:23:53 CDT 2021 Tong Ho <tong.ho@xilinx.com> hw/nvram: Introduce Xilinx Versal eFuse device
This implements the Xilinx Versal eFuse, an one-time field-programmable non-volatile storage device. There is only one such device in the Xilinx Versal product family.
This device has two separate mmio interfaces, a controller and a flatten readback.
The controller provides interfaces for field-programming, configuration, control, and status.
The flatten readback is a cache to provide a byte-accessible read-only interface to efficiently read efuse array.
Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | xlnx-versal-efuse-ctrl.c | 9e4aa1fa Fri Sep 17 00:23:53 CDT 2021 Tong Ho <tong.ho@xilinx.com> hw/nvram: Introduce Xilinx Versal eFuse device
This implements the Xilinx Versal eFuse, an one-time field-programmable non-volatile storage device. There is only one such device in the Xilinx Versal product family.
This device has two separate mmio interfaces, a controller and a flatten readback.
The controller provides interfaces for field-programming, configuration, control, and status.
The flatten readback is a cache to provide a byte-accessible read-only interface to efficiently read efuse array.
Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | meson.build | 9e4aa1fa Fri Sep 17 00:23:53 CDT 2021 Tong Ho <tong.ho@xilinx.com> hw/nvram: Introduce Xilinx Versal eFuse device
This implements the Xilinx Versal eFuse, an one-time field-programmable non-volatile storage device. There is only one such device in the Xilinx Versal product family.
This device has two separate mmio interfaces, a controller and a flatten readback.
The controller provides interfaces for field-programming, configuration, control, and status.
The flatten readback is a cache to provide a byte-accessible read-only interface to efficiently read efuse array.
Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | Kconfig | 9e4aa1fa Fri Sep 17 00:23:53 CDT 2021 Tong Ho <tong.ho@xilinx.com> hw/nvram: Introduce Xilinx Versal eFuse device
This implements the Xilinx Versal eFuse, an one-time field-programmable non-volatile storage device. There is only one such device in the Xilinx Versal product family.
This device has two separate mmio interfaces, a controller and a flatten readback.
The controller provides interfaces for field-programming, configuration, control, and status.
The flatten readback is a cache to provide a byte-accessible read-only interface to efficiently read efuse array.
Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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/openbmc/qemu/include/hw/nvram/ |
H A D | xlnx-versal-efuse.h | 9e4aa1fa Fri Sep 17 00:23:53 CDT 2021 Tong Ho <tong.ho@xilinx.com> hw/nvram: Introduce Xilinx Versal eFuse device
This implements the Xilinx Versal eFuse, an one-time field-programmable non-volatile storage device. There is only one such device in the Xilinx Versal product family.
This device has two separate mmio interfaces, a controller and a flatten readback.
The controller provides interfaces for field-programming, configuration, control, and status.
The flatten readback is a cache to provide a byte-accessible read-only interface to efficiently read efuse array.
Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Tong Ho <tong.ho@xilinx.com> Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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