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/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dmpc8568mds.c9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
/openbmc/u-boot/board/freescale/mpc8572ds/
H A Dmpc8572ds.c9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
/openbmc/u-boot/board/freescale/mpc8548cds/
H A Dmpc8548cds.c9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
/openbmc/u-boot/board/freescale/mpc8544ds/
H A Dmpc8544ds.c9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
/openbmc/u-boot/board/freescale/mpc8536ds/
H A Dmpc8536ds.c9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
/openbmc/u-boot/board/sbc8548/
H A Dsbc8548.c9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
/openbmc/u-boot/include/configs/
H A DMPC8568MDS.h9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
H A DMPC8544DS.h9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
H A DMPC8548CDS.h9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
H A DMPC8572DS.h9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
H A DMPC8536DS.h9b0ad1b1 Tue Oct 28 04:53:38 CDT 2008 Dave Liu <daveliu@freescale.com> 85xx: remove the unused ddr_enable_ecc in the board file

The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>