Searched hist:"98 c4b366" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-tegra-periph.c | 98c4b366 Mon Apr 20 08:05:33 CDT 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
98c4b366 Mon Apr 20 08:05:33 CDT 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| H A D | clk-id.h | 98c4b366 Mon Apr 20 08:05:33 CDT 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
98c4b366 Mon Apr 20 08:05:33 CDT 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
| H A D | clk-tegra210.c | 98c4b366 Mon Apr 20 08:05:33 CDT 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
98c4b366 Mon Apr 20 08:05:33 CDT 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock
This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
|