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/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt6797-img.c96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt6797-vdec.c96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt6797-venc.c96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt6797-mm.c96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt6797.c96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A DKconfig96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A DMakefile96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
96596aa0 Fri Apr 07 20:20:30 CDT 2017 Kevin-CW Chen <kevin-cw.chen@mediatek.com> clk: mediatek: add clk support for MT6797

Add MT6797 clock support, include topckgen, apmixedsys, infracfg
and subsystem clocks

Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>