Searched hist:"930 c3d00" (Results 1 – 7 of 7) sorted by relevance
/openbmc/qemu/target/openrisc/ | ||
H A D | interrupt_helper.c | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |
H A D | interrupt.c | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |
H A D | mmu.c | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |
H A D | machine.c | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |
H A D | cpu.c | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |
H A D | cpu.h | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |
H A D | translate.c | 930c3d00 Thu Feb 19 00:19:18 CST 2015 Richard Henderson <rth@twiddle.net> target/openrisc: Implement lwa, swa |