Searched hist:"8 e46c4b8" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | exynos5433.h | 8e46c4b8 Mon Feb 02 18:13:54 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8e46c4b8 Mon Feb 02 18:13:54 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5433.c | 8e46c4b8 Mon Feb 02 18:13:54 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8e46c4b8 Mon Feb 02 18:13:54 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add clocks for CMU_ISP domain
This patch adds the mux/divider/gate clocks for CMU_ISP domain which
generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
|