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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-exynos5420.c | 8b4a7acf Wed Jun 05 11:54:00 CDT 2019 Lukasz Luba <l.luba@partner.samsung.com> clk: samsung: add BPLL rate table for Exynos 5422 SoC
Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory
Controller frequencies for driver's DRAM timings.
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8b4a7acf Wed Jun 05 11:54:00 CDT 2019 Lukasz Luba <l.luba@partner.samsung.com> clk: samsung: add BPLL rate table for Exynos 5422 SoC
Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory
Controller frequencies for driver's DRAM timings.
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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