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H A Disst-core-tpmi.c79554aaa Mon Aug 08 11:01:00 CDT 2022 Zhang Rui <rui.zhang@intel.com> tools/power/x86/intel-speed-select: Introduce TPMI interface support

TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.

SST feature is exposed via the TPMI interface on newer Xeon platforms.

Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.

Introduce support for the platforms that do SST control via TPMI interface.

Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
H A DBuild79554aaa Mon Aug 08 11:01:00 CDT 2022 Zhang Rui <rui.zhang@intel.com> tools/power/x86/intel-speed-select: Introduce TPMI interface support

TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.

SST feature is exposed via the TPMI interface on newer Xeon platforms.

Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.

Introduce support for the platforms that do SST control via TPMI interface.

Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
H A Disst-core.c79554aaa Mon Aug 08 11:01:00 CDT 2022 Zhang Rui <rui.zhang@intel.com> tools/power/x86/intel-speed-select: Introduce TPMI interface support

TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.

SST feature is exposed via the TPMI interface on newer Xeon platforms.

Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.

Introduce support for the platforms that do SST control via TPMI interface.

Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
H A Disst.h79554aaa Mon Aug 08 11:01:00 CDT 2022 Zhang Rui <rui.zhang@intel.com> tools/power/x86/intel-speed-select: Introduce TPMI interface support

TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.

SST feature is exposed via the TPMI interface on newer Xeon platforms.

Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.

Introduce support for the platforms that do SST control via TPMI interface.

Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>