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/openbmc/u-boot/drivers/clk/sunxi/
H A Dclk_r40.c78eb2a41 Sun Aug 05 00:46:33 CDT 2018 Jagan Teki <jagan@amarulasolutions.com> clk: sunxi: Add Allwinner R40 CLK driver

Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_gate
for R40, so it can accessed in common clk enable
and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for R40, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
H A DKconfig78eb2a41 Sun Aug 05 00:46:33 CDT 2018 Jagan Teki <jagan@amarulasolutions.com> clk: sunxi: Add Allwinner R40 CLK driver

Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_gate
for R40, so it can accessed in common clk enable
and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for R40, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
H A DMakefile78eb2a41 Sun Aug 05 00:46:33 CDT 2018 Jagan Teki <jagan@amarulasolutions.com> clk: sunxi: Add Allwinner R40 CLK driver

Add initial clock driver for Allwinner R40.

- Implement USB bus and USB clocks via ccu_clk_gate
for R40, so it can accessed in common clk enable
and disable functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for R40, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>