Searched hist:"77 cfbf5d" (Results 1 – 3 of 3) sorted by relevance
/openbmc/qemu/docs/specs/ |
H A D | riscv-iommu.rst | 77cfbf5d Wed Oct 16 15:40:36 CDT 2024 Daniel Henrique Barboza <dbarboza@ventanamicro.com> docs/specs: add riscv-iommu
Add a simple guideline to use the existing RISC-V IOMMU support we just added.
This doc will be updated once we add the riscv-iommu-sys device.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241016204038.649340-13-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
H A D | index.rst | 77cfbf5d Wed Oct 16 15:40:36 CDT 2024 Daniel Henrique Barboza <dbarboza@ventanamicro.com> docs/specs: add riscv-iommu
Add a simple guideline to use the existing RISC-V IOMMU support we just added.
This doc will be updated once we add the riscv-iommu-sys device.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241016204038.649340-13-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|
/openbmc/qemu/docs/system/riscv/ |
H A D | virt.rst | 77cfbf5d Wed Oct 16 15:40:36 CDT 2024 Daniel Henrique Barboza <dbarboza@ventanamicro.com> docs/specs: add riscv-iommu
Add a simple guideline to use the existing RISC-V IOMMU support we just added.
This doc will be updated once we add the riscv-iommu-sys device.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241016204038.649340-13-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
|