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/openbmc/u-boot/board/freescale/corenet_ds/
H A DMAINTAINERS73cc2f50 Tue Jun 16 00:06:30 CDT 2015 Aneesh Bansal <aneesh.bansal@freescale.com> powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040

Secure Boot Target is added for NAND for P5020 and P5040.
The Secure boot target has already been added for P3041 by
enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM.

The targets for P5020 and P5040 are added in the same manner.

Signed-off-by: Saksham Jain <saksham@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
/openbmc/u-boot/configs/
H A DP5020DS_NAND_SECURE_BOOT_defconfig73cc2f50 Tue Jun 16 00:06:30 CDT 2015 Aneesh Bansal <aneesh.bansal@freescale.com> powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040

Secure Boot Target is added for NAND for P5020 and P5040.
The Secure boot target has already been added for P3041 by
enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM.

The targets for P5020 and P5040 are added in the same manner.

Signed-off-by: Saksham Jain <saksham@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
H A DP5040DS_NAND_SECURE_BOOT_defconfig73cc2f50 Tue Jun 16 00:06:30 CDT 2015 Aneesh Bansal <aneesh.bansal@freescale.com> powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P5020 and P5040

Secure Boot Target is added for NAND for P5020 and P5040.
The Secure boot target has already been added for P3041 by
enabling CONFIG_SYS_RAMBOOT and configuring CPC as SRAM.

The targets for P5020 and P5040 are added in the same manner.

Signed-off-by: Saksham Jain <saksham@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>