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/openbmc/linux/drivers/net/ethernet/ti/ |
H A D | cpsw.c | 6d3d76f8 Tue Jun 18 04:34:35 CDT 2013 Mugunthan V N <mugunthanvnm@ti.com> drivers: net: cpsw: fix cpsw clock gating issue across suspend/resume
Due to some hardware integration issue, CPSW sliver modules requires a reset across suspend/resume cycle for a successful clock gating to CPGMAC (CPSW and Davinci MDIO) in AM335x PG1.0. This issue is fixed in PG2.x, though to support suspend/resume on PG1.0 this reset is required.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net> 6d3d76f8 Tue Jun 18 04:34:35 CDT 2013 Mugunthan V N <mugunthanvnm@ti.com> drivers: net: cpsw: fix cpsw clock gating issue across suspend/resume Due to some hardware integration issue, CPSW sliver modules requires a reset across suspend/resume cycle for a successful clock gating to CPGMAC (CPSW and Davinci MDIO) in AM335x PG1.0. This issue is fixed in PG2.x, though to support suspend/resume on PG1.0 this reset is required. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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