Home
last modified time | relevance | path

Searched hist:"6 c00cac1" (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210.dtsi6c00cac1 Thu Jan 31 21:43:47 CST 2019 Joseph Lo <josephl@nvidia.com> arm64: tegra: Add L2 cache topology to Tegra210

Add L2 cache and make it the next level of cache for each of the CPUs.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
6c00cac1 Thu Jan 31 21:43:47 CST 2019 Joseph Lo <josephl@nvidia.com> arm64: tegra: Add L2 cache topology to Tegra210

Add L2 cache and make it the next level of cache for each of the CPUs.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>