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| H A D | sun50i-a64.dtsi | 6bc37fac Mon Jan 18 04:24:31 CST 2016 Andre Przywara <andre.przywara@arm.com> arm64: dts: add Allwinner A64 SoC .dtsi
The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
and the typical tablet / TV box peripherals.
The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
the peripherals and the memory map.
Although the cores are proper 64-bit ones, the whole SoC is actually
limited to 4GB (including all the supported DRAM), so we use 32-bit
address and size cells. This has the nice feature of us being able to
reuse the DT for 32-bit kernels as well.
This .dtsi lists the hardware that we support so far.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Convert to CCU binding, drop the MMC support for now]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
6bc37fac Mon Jan 18 04:24:31 CST 2016 Andre Przywara <andre.przywara@arm.com> arm64: dts: add Allwinner A64 SoC .dtsi
The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
and the typical tablet / TV box peripherals.
The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
the peripherals and the memory map.
Although the cores are proper 64-bit ones, the whole SoC is actually
limited to 4GB (including all the supported DRAM), so we use 32-bit
address and size cells. This has the nice feature of us being able to
reuse the DT for 32-bit kernels as well.
This .dtsi lists the hardware that we support so far.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Convert to CCU binding, drop the MMC support for now]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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