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/openbmc/u-boot/board/freescale/mpc8572ds/
H A Dmpc8572ds.c6bb5b412 Tue Jul 14 22:42:01 CDT 2009 Kumar Gala <galak@kernel.crashing.org> 85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
/openbmc/u-boot/board/freescale/mpc8544ds/
H A Dmpc8544ds.c6bb5b412 Tue Jul 14 22:42:01 CDT 2009 Kumar Gala <galak@kernel.crashing.org> 85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
/openbmc/u-boot/board/freescale/mpc8536ds/
H A Dmpc8536ds.c6bb5b412 Tue Jul 14 22:42:01 CDT 2009 Kumar Gala <galak@kernel.crashing.org> 85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
/openbmc/u-boot/include/configs/
H A DMPC8544DS.h6bb5b412 Tue Jul 14 22:42:01 CDT 2009 Kumar Gala <galak@kernel.crashing.org> 85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
H A DMPC8572DS.h6bb5b412 Tue Jul 14 22:42:01 CDT 2009 Kumar Gala <galak@kernel.crashing.org> 85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
H A DMPC8536DS.h6bb5b412 Tue Jul 14 22:42:01 CDT 2009 Kumar Gala <galak@kernel.crashing.org> 85xx: Report which "bank" of NOR flash we are booting from on FSL boards

The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>