Searched hist:"6 b4bbd6a" (Results 1 – 5 of 5) sorted by relevance
/openbmc/qemu/hw/openrisc/ |
H A D | cputimer.c | 6b4bbd6a Mon Aug 21 16:37:10 CDT 2017 Stafford Horne <shorne@gmail.com> openrisc/cputimer: Perparation for Multicore In order to support multicore system we move some of the previously static state variables into the state of each core. On the other hand in order to allow timers to be synced between each code the ttcr (tick timer count register) is moved out of the core. This is not as per real hardware spec which has a separate timer counter per core, but it seems the most simple way to keep each clock in sync. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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/openbmc/qemu/target/openrisc/ |
H A D | machine.c | 6b4bbd6a Mon Aug 21 16:37:10 CDT 2017 Stafford Horne <shorne@gmail.com> openrisc/cputimer: Perparation for Multicore In order to support multicore system we move some of the previously static state variables into the state of each core. On the other hand in order to allow timers to be synced between each code the ttcr (tick timer count register) is moved out of the core. This is not as per real hardware spec which has a separate timer counter per core, but it seems the most simple way to keep each clock in sync. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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H A D | sys_helper.c | 6b4bbd6a Mon Aug 21 16:37:10 CDT 2017 Stafford Horne <shorne@gmail.com> openrisc/cputimer: Perparation for Multicore In order to support multicore system we move some of the previously static state variables into the state of each core. On the other hand in order to allow timers to be synced between each code the ttcr (tick timer count register) is moved out of the core. This is not as per real hardware spec which has a separate timer counter per core, but it seems the most simple way to keep each clock in sync. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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H A D | cpu.c | 6b4bbd6a Mon Aug 21 16:37:10 CDT 2017 Stafford Horne <shorne@gmail.com> openrisc/cputimer: Perparation for Multicore In order to support multicore system we move some of the previously static state variables into the state of each core. On the other hand in order to allow timers to be synced between each code the ttcr (tick timer count register) is moved out of the core. This is not as per real hardware spec which has a separate timer counter per core, but it seems the most simple way to keep each clock in sync. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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H A D | cpu.h | 6b4bbd6a Mon Aug 21 16:37:10 CDT 2017 Stafford Horne <shorne@gmail.com> openrisc/cputimer: Perparation for Multicore In order to support multicore system we move some of the previously static state variables into the state of each core. On the other hand in order to allow timers to be synced between each code the ttcr (tick timer count register) is moved out of the core. This is not as per real hardware spec which has a separate timer counter per core, but it seems the most simple way to keep each clock in sync. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
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