Searched hist:"6863 aaa8" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/riscv/boot/dts/microchip/ |
| H A D | mpfs-icicle-kit-fabric.dtsi | 6863aaa8 Tue Sep 20 04:31:55 CDT 2022 Conor Dooley <conor.dooley@microchip.com> riscv: dts: microchip: add the mpfs' fabric clock control
The "fabric clocks" in current PolarFire SoC device trees are not
really fixed clocks. Their frequency is set by the bitstream, so having
them located in -fabric.dtsi is not a problem - they're just as "fixed"
as the IP blocks etc used in the FPGA fabric.
However, their configuration can be read at runtime (and to an extent
they can be controlled, although the intended usage is static
configurations set by the bitstream) through the system controller bus.
In the v2022.09 icicle kit reference design a single CCC (north-west
corner) is enabled, using a 50 MHz off-chip oscillator as its reference.
Updating to the v2022.09 icicle kit reference design is required, as
prior to this release, the CCC was not fixed & could change for any
given run of the synthesis tool.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
|
| H A D | mpfs-icicle-kit.dts | 6863aaa8 Tue Sep 20 04:31:55 CDT 2022 Conor Dooley <conor.dooley@microchip.com> riscv: dts: microchip: add the mpfs' fabric clock control
The "fabric clocks" in current PolarFire SoC device trees are not
really fixed clocks. Their frequency is set by the bitstream, so having
them located in -fabric.dtsi is not a problem - they're just as "fixed"
as the IP blocks etc used in the FPGA fabric.
However, their configuration can be read at runtime (and to an extent
they can be controlled, although the intended usage is static
configurations set by the bitstream) through the system controller bus.
In the v2022.09 icicle kit reference design a single CCC (north-west
corner) is enabled, using a 50 MHz off-chip oscillator as its reference.
Updating to the v2022.09 icicle kit reference design is required, as
prior to this release, the CCC was not fixed & could change for any
given run of the synthesis tool.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
|
| H A D | mpfs.dtsi | 6863aaa8 Tue Sep 20 04:31:55 CDT 2022 Conor Dooley <conor.dooley@microchip.com> riscv: dts: microchip: add the mpfs' fabric clock control
The "fabric clocks" in current PolarFire SoC device trees are not
really fixed clocks. Their frequency is set by the bitstream, so having
them located in -fabric.dtsi is not a problem - they're just as "fixed"
as the IP blocks etc used in the FPGA fabric.
However, their configuration can be read at runtime (and to an extent
they can be controlled, although the intended usage is static
configurations set by the bitstream) through the system controller bus.
In the v2022.09 icicle kit reference design a single CCC (north-west
corner) is enabled, using a 50 MHz off-chip oscillator as its reference.
Updating to the v2022.09 icicle kit reference design is required, as
prior to this release, the CCC was not fixed & could change for any
given run of the synthesis tool.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
|