Searched hist:"67 d5ced5" (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | r100.c | 67d5ced5 Fri Jul 05 09:05:49 CDT 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon: fix surface setup on r1xx
r1xx asics have a slightly different surface register
setup compared to newer asics. There is no specific
enable bit for macro tiling, rather, to disable macro
tiling, you need to set the surface pitch to 0.
With this fixed, the special rn50 handling can go.
Noticed-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
67d5ced5 Fri Jul 05 09:05:49 CDT 2013 Alex Deucher <alexander.deucher@amd.com> drm/radeon: fix surface setup on r1xx
r1xx asics have a slightly different surface register
setup compared to newer asics. There is no specific
enable bit for macro tiling, rather, to disable macro
tiling, you need to set the surface pitch to 0.
With this fixed, the special rn50 handling can go.
Noticed-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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