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/openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_cmd.h66d52f3b Fri Nov 27 21:51:45 CST 2020 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add support for TX hardware checksum offload

For the device that supports TX hardware checksum, the hardware
can calculate the checksum from the start and fill the checksum
to the offset position, which reduces the operations of
calculating the type and header length of L3/L4. So add this
feature for the HNS3 ethernet driver.

The previous simple BD description is unsuitable, rename it as
HW TX CSUM.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/openbmc/linux/drivers/net/ethernet/hisilicon/hns3/
H A Dhns3_debugfs.c66d52f3b Fri Nov 27 21:51:45 CST 2020 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add support for TX hardware checksum offload

For the device that supports TX hardware checksum, the hardware
can calculate the checksum from the start and fill the checksum
to the offset position, which reduces the operations of
calculating the type and header length of L3/L4. So add this
feature for the HNS3 ethernet driver.

The previous simple BD description is unsuitable, rename it as
HW TX CSUM.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
H A Dhns3_enet.h66d52f3b Fri Nov 27 21:51:45 CST 2020 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add support for TX hardware checksum offload

For the device that supports TX hardware checksum, the hardware
can calculate the checksum from the start and fill the checksum
to the offset position, which reduces the operations of
calculating the type and header length of L3/L4. So add this
feature for the HNS3 ethernet driver.

The previous simple BD description is unsuitable, rename it as
HW TX CSUM.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
H A Dhnae3.h66d52f3b Fri Nov 27 21:51:45 CST 2020 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add support for TX hardware checksum offload

For the device that supports TX hardware checksum, the hardware
can calculate the checksum from the start and fill the checksum
to the offset position, which reduces the operations of
calculating the type and header length of L3/L4. So add this
feature for the HNS3 ethernet driver.

The previous simple BD description is unsuitable, rename it as
HW TX CSUM.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
H A Dhns3_enet.c66d52f3b Fri Nov 27 21:51:45 CST 2020 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add support for TX hardware checksum offload

For the device that supports TX hardware checksum, the hardware
can calculate the checksum from the start and fill the checksum
to the offset position, which reduces the operations of
calculating the type and header length of L3/L4. So add this
feature for the HNS3 ethernet driver.

The previous simple BD description is unsuitable, rename it as
HW TX CSUM.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

/openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_cmd.h66d52f3b Fri Nov 27 21:51:45 CST 2020 Huazhong Tan <tanhuazhong@huawei.com> net: hns3: add support for TX hardware checksum offload

For the device that supports TX hardware checksum, the hardware
can calculate the checksum from the start and fill the checksum
to the offset position, which reduces the operations of
calculating the type and header length of L3/L4. So add this
feature for the HNS3 ethernet driver.

The previous simple BD description is unsuitable, rename it as
HW TX CSUM.

Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>