Searched hist:"644 a3cd7" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/u-boot/arch/riscv/include/asm/ |
| H A D | syscon.h | 644a3cd7 Wed Dec 12 08:12:30 CST 2018 Bin Meng <bmeng.cn@gmail.com> riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
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| H A D | global_data.h | 644a3cd7 Wed Dec 12 08:12:30 CST 2018 Bin Meng <bmeng.cn@gmail.com> riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
|
| /openbmc/u-boot/arch/riscv/lib/ |
| H A D | sifive_clint.c | 644a3cd7 Wed Dec 12 08:12:30 CST 2018 Bin Meng <bmeng.cn@gmail.com> riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
|
| H A D | Makefile | 644a3cd7 Wed Dec 12 08:12:30 CST 2018 Bin Meng <bmeng.cn@gmail.com> riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
|
| /openbmc/u-boot/arch/riscv/ |
| H A D | Kconfig | 644a3cd7 Wed Dec 12 08:12:30 CST 2018 Bin Meng <bmeng.cn@gmail.com> riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor
(CLINT). The CLINT block holds memory-mapped control and status
registers associated with software and timer interrupts.
This driver implements the riscv_get_time() API as required by
the generic RISC-V timer driver, as well as some other APIs that
are needed for handling IPI.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
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