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H A Dddr.c634bc554 Thu Mar 17 13:18:11 CDT 2011 York Sun <yorksun@freescale.com> powerpc/mpc8572ds: revise board specific timing for dual-rank DIMMs

Tested all possible values for clk_adjust and write_data_delay for dual
rank UDIMM and RDIMM to revise the tables.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>