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| H A D | armada-37xx.dtsi | 5f926e88 Sat Jul 01 09:16:35 CDT 2017 Marc Zyngier <marc.zyngier@arm.com> ARM64: dts: marvell: armada-37xx: Enable memory-mapped GIC CPU interface
The Cortex-A53s that power the Armada-37xx SoCs are equipped with
a GIC CPU interface that gets enabled when coupled with a GICv3
interrupt controller, such as the GIC-500 on the this SoC.
Advertise the MMIO ranges provided by the CPUs, which enables
(among other things) GICv2 guests to run under a hypervisor such
as KVM.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
5f926e88 Sat Jul 01 09:16:35 CDT 2017 Marc Zyngier <marc.zyngier@arm.com> ARM64: dts: marvell: armada-37xx: Enable memory-mapped GIC CPU interface
The Cortex-A53s that power the Armada-37xx SoCs are equipped with
a GIC CPU interface that gets enabled when coupled with a GICv3
interrupt controller, such as the GIC-500 on the this SoC.
Advertise the MMIO ranges provided by the CPUs, which enables
(among other things) GICv2 guests to run under a hypervisor such
as KVM.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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