Searched hist:"5 f705402" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp-pcs-v6_20.h | 5f705402 Wed Feb 08 12:00:12 CST 2023 Abel Vesa <abel.vesa@linaro.org> phy: qcom-qmp: pcs: Add v6.20 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new PCS offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-4-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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| H A D | phy-qcom-qmp.h | 5f705402 Wed Feb 08 12:00:12 CST 2023 Abel Vesa <abel.vesa@linaro.org> phy: qcom-qmp: pcs: Add v6.20 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new PCS offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-4-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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