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| H A D | meson-axg.dtsi | 5e395e14 Tue Mar 27 22:01:29 CDT 2018 Yixun Lan <yixun.lan@amlogic.com> ARM64: dts: meson-axg: add an 32K alt aoclk
The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
5e395e14 Tue Mar 27 22:01:29 CDT 2018 Yixun Lan <yixun.lan@amlogic.com> ARM64: dts: meson-axg: add an 32K alt aoclk
The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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