Searched hist:"59 b37122" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/board/atmel/at91sam9m10g45ek/ |
| H A D | Makefile | 59b37122 Tue Apr 18 02:15:48 CDT 2017 Wenyou Yang <wenyou.yang@atmel.com> configs: at91sam9m10g45ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/configs/ |
| H A D | at91sam9m10g45ek_nandflash_defconfig | 59b37122 Tue Apr 18 02:15:48 CDT 2017 Wenyou Yang <wenyou.yang@atmel.com> configs: at91sam9m10g45ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| H A D | at91sam9m10g45ek_mmc_defconfig | 59b37122 Tue Apr 18 02:15:48 CDT 2017 Wenyou Yang <wenyou.yang@atmel.com> configs: at91sam9m10g45ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/include/configs/ |
| H A D | at91sam9m10g45ek.h | 59b37122 Tue Apr 18 02:15:48 CDT 2017 Wenyou Yang <wenyou.yang@atmel.com> configs: at91sam9m10g45ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|