Searched hist:"514 b044c" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/sound/soc/codecs/ |
| H A D | tlv320aic32x4-clk.c | 514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | tlv320aic32x4.h | 514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | tlv320aic32x4.c | 514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | Makefile | 514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | Kconfig | 514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
514b044c Thu Mar 21 19:58:45 CDT 2019 Annaliese McDermond <nh6z@nh6z.net> ASoC: tlv320aic32x4: Model PLL in CCF
Model and manage the on-board PLL as a component in the Core
Clock Framework. This should allow us to do some more complex
clock management and power control. Also, some of the
on-board chip clocks can be exposed to the outside, and this
change will make those clocks easier to consume by other
parts of the kernel.
Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
|