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/openbmc/linux/include/dt-bindings/memory/ |
H A D | mt2712-larb-port.h | 50fa3cd3 Thu May 24 07:35:31 CDT 2018 Yong Wu <yong.wu@mediatek.com> dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI
This patch adds decriptions for mt2712 IOMMU and SMI.
In order to balance the bandwidth, mt2712 has two M4Us, two smi-commons, 10 smi-larbs. and mt2712 is also MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format.
The mt2712 M4U-SMI HW diagram is as below:
EMI | ------------------------------------ | | M4U0 M4U1 | | smi-common0 smi-common1 | | ------------------------- -------------------------------- | | | | | | | | | | | | | | | | | | | | larb0 larb1 larb2 larb3 larb6 larb4 larb5 larb7 larb8 larb9 disp0 vdec cam venc jpg mdp1/disp1 mdp2/disp2 mdp3 vdo/nr tvd
All the connections are HW fixed, SW can NOT adjust it.
Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> 50fa3cd3 Thu May 24 07:35:31 CDT 2018 Yong Wu <yong.wu@mediatek.com> dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI This patch adds decriptions for mt2712 IOMMU and SMI. In order to balance the bandwidth, mt2712 has two M4Us, two smi-commons, 10 smi-larbs. and mt2712 is also MTK IOMMU gen2 which uses ARM Short-Descriptor translation table format. The mt2712 M4U-SMI HW diagram is as below: EMI | ------------------------------------ | | M4U0 M4U1 | | smi-common0 smi-common1 | | ------------------------- -------------------------------- | | | | | | | | | | | | | | | | | | | | larb0 larb1 larb2 larb3 larb6 larb4 larb5 larb7 larb8 larb9 disp0 vdec cam venc jpg mdp1/disp1 mdp2/disp2 mdp3 vdo/nr tvd All the connections are HW fixed, SW can NOT adjust it. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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