Searched hist:"4 f2493146d783d71c5dc6e72452f80b86641ba7f" (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_xventanacondops.c.inc | 4f2493146d783d71c5dc6e72452f80b86641ba7f Tue Mar 07 12:07:08 CST 2023 Philipp Tomsich <philipp.tomsich@vrull.eu> target/riscv: redirect XVentanaCondOps to use the Zicond functions
The Zicond standard extension implements the same instruction semantics as XVentanaCondOps, although using different mnemonics and opcodes.
Point XVentanaCondOps to the (newly implemented) Zicond implementation to reduce the future maintenance burden.
Also updating MAINTAINERS as trans_xventanacondops.c.inc.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230307180708.302867-3-philipp.tomsich@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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/openbmc/qemu/ |
H A D | MAINTAINERS | 4f2493146d783d71c5dc6e72452f80b86641ba7f Tue Mar 07 12:07:08 CST 2023 Philipp Tomsich <philipp.tomsich@vrull.eu> target/riscv: redirect XVentanaCondOps to use the Zicond functions
The Zicond standard extension implements the same instruction semantics as XVentanaCondOps, although using different mnemonics and opcodes.
Point XVentanaCondOps to the (newly implemented) Zicond implementation to reduce the future maintenance burden.
Also updating MAINTAINERS as trans_xventanacondops.c.inc.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230307180708.302867-3-philipp.tomsich@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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