Home
last modified time | relevance | path

Searched hist:"4 e3fea4a" (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/arm/mach-imx/
H A Dmach-ls1021a.c4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
H A Dplatsmp.c4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
H A Dcommon.h4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
H A DMakefile4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
4e3fea4a Fri Oct 31 04:01:13 CDT 2014 Jingchang Lu <b35083@freescale.com> ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>