Searched hist:"4 b801355" (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/include/dt-bindings/clock/ |
H A D | exynos5433.h | 4b801355 Mon Feb 02 08:24:05 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> 4b801355 Mon Feb 02 08:24:05 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain This patch adds the mux/divider/gate clocks for CMU_FSYS domain which contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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/openbmc/linux/drivers/clk/samsung/ |
H A D | clk-exynos5433.c | 4b801355 Mon Feb 02 08:24:05 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain
This patch adds the mux/divider/gate clocks for CMU_FSYS domain which contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> 4b801355 Mon Feb 02 08:24:05 CST 2015 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain This patch adds the mux/divider/gate clocks for CMU_FSYS domain which contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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