Searched hist:"4863 b93c" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/media/platform/qcom/camss/ |
| H A D | camss-csiphy.h | 4863b93c Thu Oct 22 12:47:06 CDT 2020 AngeloGioacchino Del Regno <kholk11@gmail.com> media: camss: csiphy: Set rate on csiX_phy clock on SDM630/660
The SDM630/660 SoCs (and variants) have another clock source
for the PHY, which must be set to a rate that's equal or
greater than the CSI PHY timer clock: failing to do this
will produce PHY overflows when trying to get a stream from
a very high bandwidth camera sensor and outputting no frame
or a partial one.
Since I haven't found any usecase in which the csiX_phy
clock needs to be higher than the csiXphy_timer, let's just
set the same rate on both, which seems to work just perfect.
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
|
| H A D | camss-csiphy.c | 4863b93c Thu Oct 22 12:47:06 CDT 2020 AngeloGioacchino Del Regno <kholk11@gmail.com> media: camss: csiphy: Set rate on csiX_phy clock on SDM630/660
The SDM630/660 SoCs (and variants) have another clock source
for the PHY, which must be set to a rate that's equal or
greater than the CSI PHY timer clock: failing to do this
will produce PHY overflows when trying to get a stream from
a very high bandwidth camera sensor and outputting no frame
or a partial one.
Since I haven't found any usecase in which the csiX_phy
clock needs to be higher than the csiXphy_timer, let's just
set the same rate on both, which seems to work just perfect.
Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
|