Home
last modified time | relevance | path

Searched hist:"44 c3c625" (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/linux/
H A Dnvme-rdma.h44c3c625 Wed Sep 22 16:55:35 CDT 2021 Max Gurtovoy <mgurtovoy@nvidia.com> nvme-rdma: limit the maximal queue size for RDMA controllers

Corrent limit of 1024 isn't valid for some of the RDMA based ctrls. In
case the target expose a cap of larger amount of entries (e.g. 1024),
the initiator may fail to create a QP with this size. Thus limit to a
value that works for all RDMA adapters.

Future general solution should use RDMA/core API to calculate this size
according to device capabilities and number of WRs needed per NVMe IO
request.

Signed-off-by: Max Gurtovoy <mgurtovoy@nvidia.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
/openbmc/linux/drivers/nvme/host/
H A Drdma.c44c3c625 Wed Sep 22 16:55:35 CDT 2021 Max Gurtovoy <mgurtovoy@nvidia.com> nvme-rdma: limit the maximal queue size for RDMA controllers

Corrent limit of 1024 isn't valid for some of the RDMA based ctrls. In
case the target expose a cap of larger amount of entries (e.g. 1024),
the initiator may fail to create a QP with this size. Thus limit to a
value that works for all RDMA adapters.

Future general solution should use RDMA/core API to calculate this size
according to device capabilities and number of WRs needed per NVMe IO
request.

Signed-off-by: Max Gurtovoy <mgurtovoy@nvidia.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>