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H A D | k3-am62a7.dtsi | 438b8dc9 Sun Mar 19 23:49:35 CDT 2023 Vignesh Raghavendra <vigneshr@ti.com> arm64: dts: ti: k3-am62a7: Correct L2 cache size to 512KB
Per AM62Ax SoC datasheet[0] L2 cache is 512KB.
[0] https://www.ti.com/lit/gpn/am62a7 Page 1.
Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230320044935.2512288-2-vigneshr@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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