Searched hist:"43581 c83" (Results 1 – 4 of 4) sorted by relevance
/openbmc/u-boot/include/configs/ |
H A D | peach-pi.h | 43581c83 Thu Nov 13 11:08:19 CST 2014 Akshay Saraswat <akshay.s@samsung.com> Config: Exynos5420: Refactor SDRAM Bank and Size Since, not every board may have all memory channels configured and all available banks of DMC used, we wish to refactor configs for Memory Bank size and numbers as per board memory config. For Example, Peach-Pit has 2GB memory and will be using only 4 banks but Peach-Pi has 3.5GB memory and will be using all 7 available SDRAM banks. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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H A D | exynos5420-common.h | 43581c83 Thu Nov 13 11:08:19 CST 2014 Akshay Saraswat <akshay.s@samsung.com> Config: Exynos5420: Refactor SDRAM Bank and Size Since, not every board may have all memory channels configured and all available banks of DMC used, we wish to refactor configs for Memory Bank size and numbers as per board memory config. For Example, Peach-Pit has 2GB memory and will be using only 4 banks but Peach-Pi has 3.5GB memory and will be using all 7 available SDRAM banks. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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H A D | smdk5420.h | 43581c83 Thu Nov 13 11:08:19 CST 2014 Akshay Saraswat <akshay.s@samsung.com> Config: Exynos5420: Refactor SDRAM Bank and Size Since, not every board may have all memory channels configured and all available banks of DMC used, we wish to refactor configs for Memory Bank size and numbers as per board memory config. For Example, Peach-Pit has 2GB memory and will be using only 4 banks but Peach-Pi has 3.5GB memory and will be using all 7 available SDRAM banks. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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H A D | peach-pit.h | 43581c83 Thu Nov 13 11:08:19 CST 2014 Akshay Saraswat <akshay.s@samsung.com> Config: Exynos5420: Refactor SDRAM Bank and Size Since, not every board may have all memory channels configured and all available banks of DMC used, we wish to refactor configs for Memory Bank size and numbers as per board memory config. For Example, Peach-Pit has 2GB memory and will be using only 4 banks but Peach-Pi has 3.5GB memory and will be using all 7 available SDRAM banks. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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