Searched hist:"404 c1ff6" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/qcom/ |
| H A D | clk-rcg.c | 404c1ff6 Fri Jul 11 14:55:27 CDT 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
404c1ff6 Fri Jul 11 14:55:27 CDT 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | mmcc-msm8960.c | 404c1ff6 Fri Jul 11 14:55:27 CDT 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
404c1ff6 Fri Jul 11 14:55:27 CDT 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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| H A D | clk-rcg.h | 404c1ff6 Fri Jul 11 14:55:27 CDT 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
404c1ff6 Fri Jul 11 14:55:27 CDT 2014 Stephen Boyd <sboyd@codeaurora.org> clk: qcom: Support bypass RCG configuration
In the case of HDMI clocks, we want to bypass the RCG's ability
to divide the output clock and pass through the parent HDMI PLL
rate. Add a simple set of clk_ops to configure the RCG to do
this. This removes the need to keep adding more frequency entries
to the tv_src clock whenever we want to support a new rate.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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