Searched hist:"3 c3a7e61" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | uvd_v5_0.c | 3c3a7e61 Wed Nov 23 04:09:22 CST 2016 Rex Zhu <Rex.Zhu@amd.com> drm/amdgpu: fix bug mclk can't change on Polaris
the root cause is we gate the clock to uvd vcpu.
mclk's change should need the response from uvd if
it is power on.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3c3a7e61 Wed Nov 23 04:09:22 CST 2016 Rex Zhu <Rex.Zhu@amd.com> drm/amdgpu: fix bug mclk can't change on Polaris
the root cause is we gate the clock to uvd vcpu.
mclk's change should need the response from uvd if
it is power on.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
| H A D | uvd_v6_0.c | 3c3a7e61 Wed Nov 23 04:09:22 CST 2016 Rex Zhu <Rex.Zhu@amd.com> drm/amdgpu: fix bug mclk can't change on Polaris
the root cause is we gate the clock to uvd vcpu.
mclk's change should need the response from uvd if
it is power on.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3c3a7e61 Wed Nov 23 04:09:22 CST 2016 Rex Zhu <Rex.Zhu@amd.com> drm/amdgpu: fix bug mclk can't change on Polaris
the root cause is we gate the clock to uvd vcpu.
mclk's change should need the response from uvd if
it is power on.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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