Searched hist:"3 af2ff08" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dmc_regs.h | 3af2ff08 Mon Jan 02 12:33:24 CST 2023 Imre Deak <imre.deak@intel.com> drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled
Make sure that PIPEDMCs are enabled whenever the corresponding pipe is
enabled.
This is required at least by the latest ADLP v2.18 firmware, which adds
a new handler enabled by default and running whenever the pipe is
enabled at the vertical referesh rate.
Bspec: 50344, 67620
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230102183324.862279-1-imre.deak@intel.com
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| H A D | intel_dmc.h | 3af2ff08 Mon Jan 02 12:33:24 CST 2023 Imre Deak <imre.deak@intel.com> drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled
Make sure that PIPEDMCs are enabled whenever the corresponding pipe is
enabled.
This is required at least by the latest ADLP v2.18 firmware, which adds
a new handler enabled by default and running whenever the pipe is
enabled at the vertical referesh rate.
Bspec: 50344, 67620
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230102183324.862279-1-imre.deak@intel.com
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| H A D | intel_modeset_setup.c | 3af2ff08 Mon Jan 02 12:33:24 CST 2023 Imre Deak <imre.deak@intel.com> drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled
Make sure that PIPEDMCs are enabled whenever the corresponding pipe is
enabled.
This is required at least by the latest ADLP v2.18 firmware, which adds
a new handler enabled by default and running whenever the pipe is
enabled at the vertical referesh rate.
Bspec: 50344, 67620
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230102183324.862279-1-imre.deak@intel.com
|
| H A D | intel_dmc.c | 3af2ff08 Mon Jan 02 12:33:24 CST 2023 Imre Deak <imre.deak@intel.com> drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled
Make sure that PIPEDMCs are enabled whenever the corresponding pipe is
enabled.
This is required at least by the latest ADLP v2.18 firmware, which adds
a new handler enabled by default and running whenever the pipe is
enabled at the vertical referesh rate.
Bspec: 50344, 67620
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230102183324.862279-1-imre.deak@intel.com
|
| H A D | intel_display.c | 3af2ff08 Mon Jan 02 12:33:24 CST 2023 Imre Deak <imre.deak@intel.com> drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled
Make sure that PIPEDMCs are enabled whenever the corresponding pipe is
enabled.
This is required at least by the latest ADLP v2.18 firmware, which adds
a new handler enabled by default and running whenever the pipe is
enabled at the vertical referesh rate.
Bspec: 50344, 67620
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230102183324.862279-1-imre.deak@intel.com
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