Searched hist:"390 d1b46" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/mips/include/asm/mach-lantiq/falcon/ |
| H A D | falcon_irq.h | 390d1b46 Sun Jan 06 12:44:12 CST 2019 Hauke Mehrtens <hauke@hauke-m.de> MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
390d1b46 Sun Jan 06 12:44:12 CST 2019 Hauke Mehrtens <hauke@hauke-m.de> MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
|
| /openbmc/linux/arch/mips/include/asm/mach-lantiq/xway/ |
| H A D | lantiq_irq.h | 390d1b46 Sun Jan 06 12:44:12 CST 2019 Hauke Mehrtens <hauke@hauke-m.de> MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
390d1b46 Sun Jan 06 12:44:12 CST 2019 Hauke Mehrtens <hauke@hauke-m.de> MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
|
| /openbmc/linux/arch/mips/lantiq/ |
| H A D | irq.c | 390d1b46 Sun Jan 06 12:44:12 CST 2019 Hauke Mehrtens <hauke@hauke-m.de> MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
390d1b46 Sun Jan 06 12:44:12 CST 2019 Hauke Mehrtens <hauke@hauke-m.de> MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
|