Searched hist:"37 f2808b" (Results 1 – 5 of 5) sorted by relevance
/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | p5040si-post.dtsi | 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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H A D | p3041si-post.dtsi | 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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H A D | p5020si-post.dtsi | 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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H A D | p4080si-post.dtsi | 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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H A D | p2041si-post.dtsi | 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs
Identifies the epu as compatible with Chassis v1 Debug IP.
Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 37f2808b Tue Mar 05 13:46:56 CST 2013 Stephen George <Stephen.George@freescale.com> powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCs Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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