Searched hist:"35 c86bf6" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/rtc/ |
| H A D | rtc-wm831x.c | 35c86bf6 Thu Aug 27 12:59:05 CDT 2009 Mark Brown <broonie@opensource.wolfsonmicro.com> rtc: Add support for RTCs on Wolfson WM831x devices
The WM831x series of PMICs contain RTC functionality. The hardware
provides a 32 bit counter incrementing at 1Hz together with a per
tick interrupt and an alarm value. For simplicity the driver chooses
to define the epoch for the counter as the Unix epoch - if required
platform data can be used in future to customise this.
When powered on from a completely cold state the RTC reports that it
has not been configured - when this happens an error is returned
when attempting to read the RTC in order to avoid use of values we
know to be invalid.
The hardware also provides security features which mean that it can
ignore attempts to set the RTC time in certain circumstances, most
notably if the RTC is written to too often. These errors are detected
by verifying the written RTC value.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
35c86bf6 Thu Aug 27 12:59:05 CDT 2009 Mark Brown <broonie@opensource.wolfsonmicro.com> rtc: Add support for RTCs on Wolfson WM831x devices
The WM831x series of PMICs contain RTC functionality. The hardware
provides a 32 bit counter incrementing at 1Hz together with a per
tick interrupt and an alarm value. For simplicity the driver chooses
to define the epoch for the counter as the Unix epoch - if required
platform data can be used in future to customise this.
When powered on from a completely cold state the RTC reports that it
has not been configured - when this happens an error is returned
when attempting to read the RTC in order to avoid use of values we
know to be invalid.
The hardware also provides security features which mean that it can
ignore attempts to set the RTC time in certain circumstances, most
notably if the RTC is written to too often. These errors are detected
by verifying the written RTC value.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
|
| H A D | Makefile | 35c86bf6 Thu Aug 27 12:59:05 CDT 2009 Mark Brown <broonie@opensource.wolfsonmicro.com> rtc: Add support for RTCs on Wolfson WM831x devices
The WM831x series of PMICs contain RTC functionality. The hardware
provides a 32 bit counter incrementing at 1Hz together with a per
tick interrupt and an alarm value. For simplicity the driver chooses
to define the epoch for the counter as the Unix epoch - if required
platform data can be used in future to customise this.
When powered on from a completely cold state the RTC reports that it
has not been configured - when this happens an error is returned
when attempting to read the RTC in order to avoid use of values we
know to be invalid.
The hardware also provides security features which mean that it can
ignore attempts to set the RTC time in certain circumstances, most
notably if the RTC is written to too often. These errors are detected
by verifying the written RTC value.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
35c86bf6 Thu Aug 27 12:59:05 CDT 2009 Mark Brown <broonie@opensource.wolfsonmicro.com> rtc: Add support for RTCs on Wolfson WM831x devices
The WM831x series of PMICs contain RTC functionality. The hardware
provides a 32 bit counter incrementing at 1Hz together with a per
tick interrupt and an alarm value. For simplicity the driver chooses
to define the epoch for the counter as the Unix epoch - if required
platform data can be used in future to customise this.
When powered on from a completely cold state the RTC reports that it
has not been configured - when this happens an error is returned
when attempting to read the RTC in order to avoid use of values we
know to be invalid.
The hardware also provides security features which mean that it can
ignore attempts to set the RTC time in certain circumstances, most
notably if the RTC is written to too often. These errors are detected
by verifying the written RTC value.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
|
| H A D | Kconfig | 35c86bf6 Thu Aug 27 12:59:05 CDT 2009 Mark Brown <broonie@opensource.wolfsonmicro.com> rtc: Add support for RTCs on Wolfson WM831x devices
The WM831x series of PMICs contain RTC functionality. The hardware
provides a 32 bit counter incrementing at 1Hz together with a per
tick interrupt and an alarm value. For simplicity the driver chooses
to define the epoch for the counter as the Unix epoch - if required
platform data can be used in future to customise this.
When powered on from a completely cold state the RTC reports that it
has not been configured - when this happens an error is returned
when attempting to read the RTC in order to avoid use of values we
know to be invalid.
The hardware also provides security features which mean that it can
ignore attempts to set the RTC time in certain circumstances, most
notably if the RTC is written to too often. These errors are detected
by verifying the written RTC value.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
35c86bf6 Thu Aug 27 12:59:05 CDT 2009 Mark Brown <broonie@opensource.wolfsonmicro.com> rtc: Add support for RTCs on Wolfson WM831x devices
The WM831x series of PMICs contain RTC functionality. The hardware
provides a 32 bit counter incrementing at 1Hz together with a per
tick interrupt and an alarm value. For simplicity the driver chooses
to define the epoch for the counter as the Unix epoch - if required
platform data can be used in future to customise this.
When powered on from a completely cold state the RTC reports that it
has not been configured - when this happens an error is returned
when attempting to read the RTC in order to avoid use of values we
know to be invalid.
The hardware also provides security features which mean that it can
ignore attempts to set the RTC time in certain circumstances, most
notably if the RTC is written to too often. These errors are detected
by verifying the written RTC value.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
|