Searched hist:"32 dfc773" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-pxs3-ref.dts | 32dfc773 Wed Dec 19 23:23:13 CST 2018 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
32dfc773 Wed Dec 19 23:23:13 CST 2018 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | uniphier-pxs3.dtsi | 32dfc773 Wed Dec 19 23:23:13 CST 2018 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
32dfc773 Wed Dec 19 23:23:13 CST 2018 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | uniphier-ld20.dtsi | 32dfc773 Wed Dec 19 23:23:13 CST 2018 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
32dfc773 Wed Dec 19 23:23:13 CST 2018 Kunihiko Hayashi <hayashi.kunihiko@socionext.com> arm64: dts: uniphier: Add PCIe host controller and PHY nodes
Add PCIe host controller and PHY nodes. This supports for LD20, PXs3 and
their boards.
This node defines PCIe memory, I/O, and config spaces as follows.
MEM: 20000000-2ffdffff (255MB)
I/O: 2ffe0000-2ffeffff ( 64KB)
CFG: 2fff0000-2fffffff ( 64KB)
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|