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| /openbmc/qemu/target/ppc/ |
| H A D | cpu_init.c | 301e5d48 Fri Jan 28 06:15:03 CST 2022 Fabiano Rosas <farosas@linux.ibm.com> target/ppc: 405: Add missing MSR_ME bit
The 405 MSR has the Machine Check Enable bit. We're making use of it
when dispatching Machine Check, so add the bit to the msr_mask.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220118184448.852996-3-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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