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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | navi10_ih.c | 2d2fbf68 Tue Dec 01 09:30:12 CST 2020 Hawking Zhang <Hawking.Zhang@amd.com> drm/amdgpu: use cached ih rb control reg offsets for navi10
all the ih rb control register offsets are cached
at the beginning of navi10 ih_sw_init.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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