Searched hist:"2 b42f31e" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/hw/hppa/ |
| H A D | hppa_hardware.h | 2b42f31e Fri Mar 15 11:41:30 CDT 2019 Helge Deller <deller@gmx.de> Update seabios-hppa to latest upstream
This patch fixes two issues in the hppa/parisc emulation:
1. The CPU HPA was wrong in the sense that we had negative module
offsets in the firmware-internal module table (which we ignored up to
now). Get it correct by changing the CPU HPA to 0xfffb0000 which is
greater than the DINO_HPA of 0xfff80000.
This change requires the seabios-firmware update.
2. Sven noticed that the FPU register cr10 is only able to reference up
to 8 FPUs, so let's reduce the maximum amount of SMP CPUs too.
Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <20190315164130.GA7800@ls3530>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|
| /openbmc/qemu/pc-bios/ |
| H A D | hppa-firmware.img | ... +>l A k[ ~!ygE# 2Tv D|VGA PS2 SERIAL_1.9600.8.none ... 2b42f31e Fri Mar 15 11:41:30 CDT 2019 Helge Deller <deller@gmx.de> Update seabios-hppa to latest upstream
This patch fixes two issues in the hppa/parisc emulation:
1. The CPU HPA was wrong in the sense that we had negative module
offsets in the firmware-internal module table (which we ignored up to
now). Get it correct by changing the CPU HPA to 0xfffb0000 which is
greater than the DINO_HPA of 0xfff80000.
This change requires the seabios-firmware update.
2. Sven noticed that the FPU register cr10 is only able to reference up
to 8 FPUs, so let's reduce the maximum amount of SMP CPUs too.
Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <20190315164130.GA7800@ls3530>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
|