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/openbmc/linux/drivers/power/reset/ |
H A D | piix4-poweroff.c | 29676833 Wed Sep 28 10:30:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> power: reset: Add Intel PIIX4 poweroff driver
Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta board where it will cause QEMU to exit.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Sebastian Reichel <sre@kernel.org> 29676833 Wed Sep 28 10:30:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> power: reset: Add Intel PIIX4 poweroff driver Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta board where it will cause QEMU to exit. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Sebastian Reichel <sre@kernel.org>
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H A D | Makefile | 29676833 Wed Sep 28 10:30:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> power: reset: Add Intel PIIX4 poweroff driver
Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta board where it will cause QEMU to exit.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Sebastian Reichel <sre@kernel.org> 29676833 Wed Sep 28 10:30:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> power: reset: Add Intel PIIX4 poweroff driver Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta board where it will cause QEMU to exit. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Sebastian Reichel <sre@kernel.org>
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H A D | Kconfig | 29676833 Wed Sep 28 10:30:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> power: reset: Add Intel PIIX4 poweroff driver
Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta board where it will cause QEMU to exit.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Sebastian Reichel <sre@kernel.org> 29676833 Wed Sep 28 10:30:56 CDT 2016 Paul Burton <paul.burton@imgtec.com> power: reset: Add Intel PIIX4 poweroff driver Add a driver which allows powering off the system via an Intel PIIX4 southbridge, by entering the PIIX4 SOff state. This is useful on the MIPS Malta development board, where it will power down the FPGA based board until its ON/NMI button is pressed, or the QEMU implementation of the MIPS Malta board where it will cause QEMU to exit. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Sebastian Reichel <sre@kernel.org>
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