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/openbmc/u-boot/arch/arm/cpu/armv8/ |
H A D | cache.S | 208bd513 Thu Aug 06 04:54:13 CDT 2015 Peng Fan <Peng.Fan@freescale.com> arm: armv8 correct value passed to __asm_dcache_all >From source code comments: "x0: 0 flush & invalidate, 1 invalidate only" Current value 0xffff can make invalidate work, since we only judge whether input value is 0 or not, see following code: " tbz w1, #0, 1f dc isw, x9 b 2f 1: dc cisw, x9 /* clean & invalidate by set/way */ 2: subs x6, x6, #1 /* decrement the way */ " Later we may add "2 clean only" support. So following the comments, correct value from 0xffff to 1. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
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